Abstract
The RISC-V architecture, recognized for its modularity and efficiency,
faces challenges due to the limited availability of educational
resources. To address this issue, an interactive web simulator was
developed based on the RV32I instruction set, using the Angular
framework, with an interface integrated into a core comprising a
code parser, assembler, and processor, enabling both continuous
and step-by-step execution. The simulator’s validation confirmed
the proper functioning of essential features, including code editing,
assembling, execution, and visualization of registers and memory.
This simulator is intended for students, educators, and embedded
systems designers in projects involving the RISC-V architecture,
serving as a teaching tool in computer architecture courses.